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TSMC to Publish 7nm FinFET Technology at ISSCC 2017
By Korbin Lan
Published: Nov 15,2016
TSMC wafer
TAIPEI, Taiwan – The International Solid-State Circuits Conference (ISSCC) 2017 is going to be held on February 5, 2017 to February 9 in San Francisco, United States. And there will be 15 papers to be published from Taiwan, including TSMC’s 7-nanometer Fin Field-Effect Transistor (FinFET) technology which will be the industry’s first to announce at ISSCC 2017.
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At ISSCC 2017, a total of 208 papers were selected, and 15 papers of which came from Taiwan including nine papers from the industry and six papers form academia.
Five papers of TSMC was selected (including one from the TSMC USA), three of which are from memory circuit design department of TSMC, and the other two are analogical circuit papers.
In addition, TSMC will be the first to publish 7nm FinFET technology, and has verified it on the 256M bits high-density static random access memory test chip. It will greatly enhance the computing performance of processor of mobile phone, tablet and PC.
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