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eMemory’s OTP IP Qualified on 22nm FD-SOI Process

Published: Oct 17,2018

HSINCHU, Taiwan – eMemory today announced that its one-time programmable non-volatile memory (OTP) IP, NeoFuse, has been qualified for 22nm Fully-Depleted Silicon On-Insulator (FD-SOI), also known as 22FDX, process technology. The combination of NeoFuse and 22 nm FD-SOI provides an energy- and cost-efficient solution that customers can easily integrate into their system-on-chip (SoC) designs. The progress will enable customers to create innovative and differentiated products for the Internet of Things (IoT), Radio Frequency (RF) connectivity, and networking market segments.

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22nm FD-SOI process technology is top of mind for customers designing cost-effective devices for connected and ultra-low-power applications. The technology delivers FinFET-like performance at a cost comparable to 28nm planar technologies. The delivery of NeoFuse IP for 22nm FD-SOI process allows eMemory to offer NeoFuse to customers that have different performance, power, and area goals for their advanced IC designs.

eMemory’s NeoFuse technology requires only a single voltage pulse to be applied during programming. It is a technological breakthrough from conventional anti-fuse OTP’s multiple-pulses programming. The feature not only reduces the customers’ costs but also increases the device’s reliability. Moreover, NeoFuse is virtually impossible for anyone to reverse engineer, providing a higher level of design protection. NeoFuse is the optimum antifuse solution for customers desiring reduced cost, increased reliability, and enhanced security

"NeoFuse is a proven, market-leading compact solution that provides our customers with unparalleled value for power, performance, and cost, and we are pleased to work with the world’s leading foundry to extend the IP’s availability to the 22nm FD-SOI process platform,” said Michael Ho, Vice President of Business Development at eMemory.

eMemory also plans to roll out the second generation NeoFuse on 22nm FD-SOI, which will feature 0.5V ultra low power consumption versus the 0.7V for its first generation counterpart. Tape-out is expected by the end of Q1 2019 and verification is expected to be completed by the end of Q3 2019.

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