Designed with Silicon Motion's proprietary MIPI M-PHY, low-power architecture and advanced LDPC (Low Density Parity Check) ECC for 3D NAND support, the UFS 2.1 controller family delivers ultra-high random read/write performance of up to 50,000/40,000 IOPS, capacity up to 512GB and ultra-low power consumption for flagship and mainstream smartphones.

UFS is the latest generation embedded memory standard for mobile applications defined by JEDEC. The UFS standard features a serial link-based MIPI M-PHY interface and SCSI architecture model (SAM) which enables high-performance, energy-efficient and high-capacity embedded storage, which is critical for the multitasking and multimedia requirements of today's smartphones. Silicon Motion's newest UFS 2.1 controller family provides more than three times faster sequential and random read/write performance as compared to the eMMC 5.1 controllers.

Silicon Motion's leading-edge turnkey UFS controller and firmware technologies enable best-in-class embedded storage solutions for the increasing performance requirements of today's mobile devices. All products support multiple form factors, including discrete UFS and multi-chip uMCP embedded memory, as well as UFS memory card, and are compatible with all of the major mobile application processor platforms in the market.

The proprietary low-power LDPC ECC engine and internally developed MIPI M-PHY enable high-performance UFS memory solutions with high endurance and energy efficiency. Consistent with company's widely-adopted eMMC controllers, the turnkey UFS controller family supports 3D MLC and TLC flash from a variety of NAND flash makers.

The Silicon Motion UFS 2.1 family is currently sampling to select NAND OEM partners, and production ramp is expected later this year.