Samsung Electronics announced that it broke ground on a new EUV (extreme ultraviolet) line in Hwaseong, Korea, aiming to maintain its leadership in state-of-the-art semiconductor technology. With this new EUV line, Samsung will be able to strengthen its leadership in the single nanometer process technology by responding to market demand from various applications...

The success and proliferation of integrated circuits has largely hinged on the ability of IC manufacturers to continue offering more performance and functionality for the money. Driving down the cost of ICs (on a per-function or per-performance basis) is inescapably tied to a growing arsenal of technologies and wafer-fab manufacturing disciplines as mainstream CMOS processes reach their theoretical, practical, and economic limits...

Imec has designed and fabricated a 16,384-electrode, 1,024-channel micro-electrode array (MEA) for high-throughput multi-modal cell interfacing. The chip offers intracellular and extracellular recording, voltage- and current-controlled stimulation, impedance monitoring and spectroscopy functionalities thereby packing the most cell-interfacing modalities on a single chip, and being the only one to enable multi-well assays...

The TSIA survey showed that Q4 2017 Taiwan IC revenue as a whole (including design, manufacturing, packaging and testing) totaled NT$675.5 billion(US$22.2B) (up 5.1% on-quarter and 4.9% increase on-year). The revenue wad with NT$160...

ASML’s dominance in the semiconductor equipment market continued in 2017, according to the report “Sub-100nm Lithography: Market Analysis and Strategic Issues,” recently published by The Information Network, a New Tripoli, PA-based market research company...

The recently released 2018 edition of IC Insights’ McClean Report shows that the fastest growing types of microprocessors in the last five years have been mobile system-on-chip (SoC) designs for tablets and data-handling cellphones and MPUs used in embedded-processing applications...

KAOHSIUNG, Taiwan - Advanced Semiconductor Engineering, Inc. and Cadence Design Systems today announced they have collaborated to release a System-in-Package (SiP) EDA solution that addresses the challenges of designing and verifying Fan-Out Chip-on-Substrate (FOCoS) multi-die packages...