Sony Corporation today announced that it has developed a 1.46 effective megapixel back-illuminated CMOS image sensor equipped with a Global Shutter function. The newly developed pixel-parallel analog-to-digital converters provide the function to instantly convert the analog signal from all pixels, simultaneously exposed, to a digital signal in parallel. This new technology was announced at the International Solid-State Circuits Conference (ISSCC) on February 11, 2018 in San Francisco in the United States.
CMOS image sensors using the conventional column A/D conversion method read out the photoelectrically converted analog signals from pixels row by row, which results in image distortion (focal plane distortion) caused by the time shift due to the row-by-row readout.
The new Sony sensor comes with newly developed low-current, compact A/D converters positioned beneath each pixel. These A/D converters instantly convert the analog signal from all the simultaneously exposed pixels in parallel to a digital signal to temporarily store it in digital memory. This architecture eliminates focal plane distortion due to readout time shift, making it possible to provide a Global Shutter function*1, an industry-first for a high-sensitivity back-illuminated CMOS sensor with pixel-parallel A/D Converter with more than one megapixel.
The inclusion of nearly 1,000 times as many A/D converters compared to the traditional column A/D conversion method*2 means an increased demand for current. Sony addressed this issue by developing a compact 14-bit A/D converter which boasts the industry's best performance in low-current operation.
Both the A/D converter and digital memory spaces are secured in a stacked configuration with these elements integrated into the bottom chip. The connection between each pixel on the top chip uses Cu-Cu (copper-copper) connection, a technology that Sony put into mass production as a world-first in January 2016.
In addition, a newly developed data transfer mechanism is implemented into the sensor to enable the high-speed massively parallel readout data required for the A/D conversion process.
