Article
Analog Bits Announces Mixed Signal Design Kits for 7nm at TSMC Technology Symposium
Published: Mar 14,2017Analog Bits today announced availability of front-end design kits which enable use of low power IP on TSMC's latest 7nm process nodes. These design kits provide customers with early access to Analog Bits' latest low-power IP for SERDES, PLL, PVT sensors and POR - which are already shipping in other TSMC nodes such as 16FFC and 16FFP which will be demonstrated at the Symposium.
Analog Bits Announces Mixed Signal Design Kits for 7nm at TSMC Technology Symposium
Analog Bits today announced availability of front-end design kits which enable use of low power IP on TSMC's latest 7nm process nodes...
|
Multi-protocol SERDES and PVT Sensors have become an integral part of many modern SOCs, with applications including Mobile, HPC, Automotive and IoT. Analog Bits' success in delivering low-power and flexible IP means customers can get maximum differentiation in their SOC implementations.
981 Read
Top Stories
Related Articles
Imec Presents Alternative Metals in Advanced Interconnect and Contact Schemes As a Path to 2nm Nodes
Address: Rm. A204, No. 287-2, Sec. 3, Chengde Rd., Datong Dist., Taipei City , Taiwan (R.O.C.)
Phone:+886 2 2585-5526
E-Mail:en@ctimes.com.tw