Providing a platform that simplifies the design process for space application, Atmel’s new mixed-signal ATMX150RHA delivers up to 22 million routable gates, includes non-volatile memory blocks, flexible form factor with compiled SRAM and DPRAM blocks, and supports 2.5/3.3/5V and high-voltage (25-45-65V) I/Os with pre-qualified analog IP.

This new flexible and highly integrated ASIC delivers an overall lower bill of materials for space applications. The ATMX150RHA ASIC platform is supported by a combination of state-of-art third-party and proprietary design tools including Synopsys, Mentor and Cadence.

Leveraging Atmel’s nearly 30 years of flight heritage, the new ATMX150RHA integrates Atmel’s proven rad-hard solution and offers a full service option for customers designing ASICs up to the qualified flight models. As previous Atmel ASIC platform generations, all ATMX150RHA products are fully designed, assembled, tested and qualified in Europe.

"With our long-standing flight heritage and more than 3,500 flight models delivered, we are a leading ASIC provider for space applications with proven, reliable solutions," said Patrick Sauvage, General Manager, Aerospace Business Unit, Atmel Corporation.

"Atmel’s ATMX150RHA ASIC adds to our proven aerospace portfolio, and delivers a fully integrated solution that allows aerospace designers a flexible, yet complete solution to help accelerate their space mission. The new ASIC is further testament to our aerospace leadership."

Features:

－ Comprehensive Library of Standard Logic and I/O Cells

－ Up to 15 usable Mgates equivalent NAND2

－ Operating voltage 1.8+/-0.15V for the core and 5V +/-0.5V, 3.3+/-0.3V, 2.5+/-0.25V for the periphery

－ High Voltage I/O’s 25-45-65V

－ Memory Cells Compiled (ROM, SRAM, DPRAM, Register file memory cells) or synthesized to the Requirements of the Design

－ 32KB NVM memory block

－ Cold Sparing Buffers

－ High Speed LVDS Buffers 655Mbps

－ PCI Buffers

－ Set of analog IPs

－ Low cost NRE with a Space Multi Project Wafer (SMPW) option

－ No single event latch-up below a LET threshold of 75 MeV/mg/cm² at 125°C

－ SEU hardened flip-flops

－ TID test up to 300kRads (Si) for 1.8V and 3.3V devices and 150kRads (Si) for 5V and HV I/OS according to Mil-Std 883 TM1019

－ CCGA, CLGA and CQFP qualified Packages Catalog

－ ESD better than 2000V