Xilinx defines and deploys Video over IP protocols for contribution and distribution networks with the provision of the SMPTE ST 2022-1,2 and SMPTE ST 2022-5.6 IP cores and reference designs. These cores encapsulate multiple compressed JPEG 2000 or MPEG transport streams (MPEG-TS), or uncompressed SDI streams onto 1Gb and 10Gb Ethernet IP networks, and offer optional Forward Error Correction (FEC) to recover lost packets and provide robustness in media transmission.

Xilinx's new Video over IP cores and reference designs support the SMPTE ST 2022-7 seamless (hitless) protection switching standard and are available with Xilinx Kintex-7 FPGAs and Zynq-7000 All Programmable SoCs, using FPGA Mezzanine Cards (FMCs) from Xilinx Alliance Members, inrevium AMERICA and Faster Technology. Additional SMPTE ST 2022-compliant IP cores include a brand new high-channel count Video over IP Forward Error Correction (FEC) engine that handles up to 512 transport streams.

To address timing and synchronization techniques based on the IEEE1588 Precision Time Protocol (PTP) over local and wide area networks, Xilinx has developed IP cores and reference designs that enable the distribution of video sync signals over IP networks, and generate clocks and timestamps for remote video sources.

These IP cores and reference designs are also implemented in the emerging broadcast draft standards SMPTE ST 2059-1 and -2. Compliance for these new Video over IP cores and reference designs has been validated through the Video Services Forum Inc. (VSF), and is one of the development platforms used by the VSF that won the 2014 Emmy Award for Technology and Engineering for Standardization and Productization of JPEG2000 (J2K) Interoperability.

"The transition to IP-based technologies is creating huge opportunities for cost savings, video production efficiency, and scalability, but its nascence is also creating some confusion and hesitation by some vendors in terms of protocol selection for various applications," said Robert Green, senior manager broadcast and pro a/v business segment at Xilinx.

"A Xilinx device in conjunction with an Ethernet PHY offers a firmware upgradeable Video over IP platform that supports any media over any network, with cores and reference designs enabling fast time-to-market and low risk deployment."

Features:

－ SMPTE 2022-2 RTP/UDP/IP encapsulation

－ SMPTE 2022-1 2D FEC generation and recovery

－ Support up to 8 MPEG-2 TS inputs via AXI-S interface

－ Support 188-byte and 204-byte TS configuration

－ Configurable TS per packet encapsulation

－ Flexible configurations available for each channel

－ VLAN support