When used in combination with Holtek’s AFE (Analog Front End) device, the HT82V48 can simultaneously support two CIS modules consisting of 3~6 channels. As the sampling rate for each channel can be up to 20MSPS, therefore for 12-channels this results in a total throughput of up to 240MSPS. The internal programmable timing generator provides full timing control for the CIS module, AFE and six-group LED sources.

The Image Sensor Shading Correction unit, according to their different illumination sources, can execute accurate calibration for each CIS module sensor. The internal small-scale DSP can provide additional information regarding minimum value, maximum value, average value, boundary value and histogram for each scan line.

With regard to the output data, two interface types are supported, an EMIF (External Memory Interface) and VPFE (Video Processing Front-End). Internal register programming is implemented using a two-line I²C interface or a 3/4 line SPI interface.

When used in combination with Holtek’s AFE (Analog Front End) device, the HT82V48 can simultaneously support two CIS modules consisting of 3~6 channels. As the sampling rate for each channel can be up to 20MSPS, therefore for 12-channels this results in a total throughput of up to 240MSPS. The internal programmable timing generator provides full timing control for the CIS module, AFE and six-group LED sources.

The Image Sensor Shading Correction unit, according to their different illumination sources, can execute accurate calibration for each CIS module sensor. The internal small-scale DSP can provide additional information regarding minimum value, maximum value, average value, boundary value and histogram for each scan line. With regard to the output data, two interface types are supported, an EMIF (External Memory Interface) and VPFE (Video Processing Front-End). Internal register programming is implemented using a two-line I²C interface or a 3/4 line SPI interface.

In addition to fully meeting the needs of future high-speed duplex CIS module digital front-end processors, in permitting register control to setup the device's internal timing control and internal functions, has enabled it to resolve the previous limitations whereby timing modifications have to be implemented by redesigning an FPGA. This design enhancement now allows customers to have an unprecedented ease of use and also to achieve an accelerated time-to-market performance for related end products.

As for packaging, the HT82V70 device is supplied in a 100-pin LQFP package thus reducing PCB complexity. The combination of the above mentioned features will ensure that this new device will provide an excellent solution for duplex scanning high-speed CIS digital front-end processor applications to replace the traditional FPGA design solution.