The 9DBU buffers are offered in 2 to 9-output configurations to address virtually any PCIe application. Both non-PLL fan out and PLL zero-delay-buffer modes are supported.

“IDT has consistently led the timing industry in both performance and power, and the latest family of devices furthers our leadership position,” said Dave Shepard, vice president and general manager of Timing and RF at IDT.

“SoCs and FPGAs are moving to lower supply voltages and IDT is extending its PCIe timing solutions portfolio to address this trend. Our 1.5 V solutions take advantage of the low-voltage power savings, while simultaneously enabling customers to consolidate power rails to reduce the complexity of their systems. The new timing solutions complement IDT’s V-series of 1.8 V PCIe clocks for communications, computing, and consumer markets.”

Device options include external or internal terminations, allowing designers to choose between maximum flexibility with external termination circuitry, or maximum space savings using internal terminations. The entire family operates from a 1.5 V supply, resulting in the industry’s lowest power consumption for PCIe timing devices, with eight-output devices using a mere 40 milliwatts – reducing cooling requirements and lowering operating costs.

The 1.5 V U-series devices are pin-compatible with IDT’s widely-adopted 1.8 V V-series, allowing for easy substitution as SoC operating voltages continue to drop. The 9DBU buffers are compliant with PCIe Gen 1, 2, and 3 so designers can use the same component through several generations of product.