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TSMC Recognizes Synopsys with Partner Awards for Interface IP, 10nm FinFET

Published: Sep 28,2015

Synopsys today announced that TSMC is recognizing Synopsys with two "2015 Partner of the Year" awards for Interface IP and Joint Development of 10-nanometer (nm) FinFET Design Infrastructure.

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Synopsys and TSMC have been collaborating for more than 15 years, most recently to accelerate the adoption of FinFET technology for optimum power, performance and area for the 10-nm process. This is the 5th consecutive year Synopsys has received both IP and electronic design automation (EDA) accolades from TSMC.

"TSMC and Synopsys share a common goal to provide an extensive portfolio of proven IP and design tools supporting TSMC process technologies," said Glenn Dukes, vice president of strategic alliances and professional services at Synopsys.

"Our strong engineering collaboration with TSMC on its 10-nanometer FinFET process results in a proven path that designers can adopt to help achieve their time-to-market goals."

"Through OIP collaboration, TSMC and Synopsys continue to provide our mutual customers with certified design implementation tools and high-quality IP optimized for TSMC's leading process technologies," said Suk Lee, TSMC senior director of the Design Infrastructure Marketing Division.

"With its qualified DesignWare IP and Galaxy Design Platform, Synopsys helps customers achieve their design goals and quickly ramp into volume production."

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