“TSMC’s 28HPC+ ULL memory bit-cell provides further leakage reduction for mainstream smart phones, mobile devices, IoT, audio and SoC applications”, said Suk Lee, TSMC Senior Director, Design Infrastructure Marketing Division. “The combination of TSMC’s leading 28HPC+ process and M31 IP enables customers to realize the benefits of optimal performance and power in developing their cutting-edge products."

Willis Shih, the Vice President of M31 Technology's Fundamental Development Department, said: “M31 Technology has launched a number of TSMC 28HPC+ ultra-low-power memory compiler IP portfolios this year, in contrast to the past when only a set of standard IP practicescould be provided to customers. This solution enables customers to have more flexibility in the choice of their design architecture. The TSMC 28HPC+ Ultra-Low Power memory compilers developed by M31 can combine TSMC ULL SRAM bit-cell with different logic components to meet various levels of low power consumption or speed performance for customers’ diversified product design needs."

M31 28HPC+ Memory Compiler IP solutions include a complete set of Green Low Power memory compilers, comprised of “One Port Register File,” “Two Port Register File,” “High Density Single Port SRAM Compiler,” “High Density Dual Port SRAM Compiler,” and “High Density VIA ROM Compiler.”

M31's innovative TSMC 28HPC+ IP solution, enables SoC designers to achieve lower power consumption, higher performance and smaller area in smart device products design. These product applications include mobile video, drone/vehicle, automotive electronics, and GPS positioning.