HSINCHU, Taiwan –TSMC today announced its 6-nanometer (N6) process, which provides a significant enhancement of its in...
According to TrendForce's newest research report, development momentum of advanced production processes has been dropping due to weakening demand in most end markets...
What exactly is SoIC? According to TSMC’s previous descriptions on technical forums, SoIC is a type of innovative multi-chip stacking technology, which can be used to carry out wafer-bonding in the manufacture of chips which are 10nm and less. The technology has a bonding structure without protrusion which gives it higher performance.
Therefore, from the description, it is a type of wafer-on-wafer bonding technology. Currently TSMC is collaborating on this with EDA tool vendors to introduce design and verification tools for manufacturing technology.
More specifically, it may be a type of 3D IC manufacturing technology, and it is possible that it will enable TSMC to directly produce 3D ICs for their customers. This technology would not only maintain Moore’s Law, but also could be expected to bring about further breakthroughs in the performance of single chips.
The key to developing this technology is achieving a joint structure without protrusions; therefore, it is very likely that through-silican vias (TSV) technology is being utilized to directly communicate to multiple chip layers through very small pores.
However, even more amazingly, TSMC’s SoIC technology can be used in 10nm and below manufacturing, meaning that chips in the future can be close to the same volume, which will more than double their performance capabilities. As a result, even TSMC themselves are very optimistic about this manufacturing technology.
(TR/ Phil Sweeney)
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