The 28 nm Broadcom BCM82792 PHY, is the first device to offer dual 100 Gigabit per second (Gbps) ports on a single gearbox chip and doubles the density of existing solutions while reducing power consumption by up to 30 percent, operating at 2 watts per port.

The rapid growth of bandwidth consumption across data center, enterprise and core networks is driving the transition of line cards and systems from 10G/40G to 100G. Poised for rapid expansion, the 100G Ethernet market is expected to grow five-fold by 2016, according to analyst firm Infonetics.

High-performance PHYs that support physical medium dependent (PMD) sub layers, such as 100GBASE-SR4 and CR4, are a critical component for this rapid growth.

Optimized for high-bandwidth networks, the dual-port Broadcom gearbox PHY has the ability to multiplex and demultiplex data across eight 25 Gbps channels to (or from) twenty 10 Gbps channels.

The device can also be configured to support eight bi-directional lanes at 10 Gbps for 10GbE or 40GbE pass-through applications. High performance 25G/10G input/output (IO) eases routing constraints by providing for longer physical links.

"Next generation 100G networks demand the high performance, low power technologies that Broadcom is uniquely positioned to deliver," said Lorenzo Longo, Broadcom Vice President and General Manager, Physical Layer Products.

"These first to market gearbox devices demonstrate our commitment to providing superior innovation and delivering a comprehensive portfolio of products to enable high density 100G networks."

"We're seeing strong demand for higher bandwidth solutions in data center, enterprise and core networks to handle the growth in network traffic," said Matthias Machowinski, Infonetics Directing Analyst, Enterprise Networks.

"The higher density and low power consumption of Broadcom's new PHY will allow network managers to transform their networks and achieve higher performance on the industry's most widely adopted copper and short range links."

Broadcom also offers the BCM82790, a single port version of its 28 nm gearbox technology. This device delivers an easy upgrade path in a drop-in package compatible with Broadcom's current gearbox PHY.

Features:

－ First IEEE802.3bj Clause 91 forward error correction (FEC) gearbox PHY

－ Three-dimensional eye mapper on each high-speed receiver (28 total)

－ 100GbE/OTN VSR28 to CAUI interface

－ Single REFCLK (reference clock) input

－ Low latency architecture