According to an estimation made by Industrial Economics and Knowledge Research Center (IEK) of ITRI, global market of wearable devices will reach USD20.6 billion by 2018, encompassing a total of 191 million units; of which semiconductor components required for assembling these products will sum up to USD3.77 billion. Major electronic manufactures are entering the circle one after another to share opportunities. Since the beginning of 2014, major chip manufacturers in the market such as Skyworks, Intel, Qualcomm, and MediaTek have aggressively launched wearable product solutions.

According to Allan Tseng, Director of Reliability Engineering Division at iST, wearable products have two major features: limited internal space for accommodating components, and printed circuits need to be flexible to conform to ergonomic requirements. Therefore, in addition to selecting FPC for wearable products, the circuit width of these boards needs to be further reduced so as to provide even more miniature solder joints and to reduce the area taken within the wearable product, thus satisfying consumers’ expectations of compact and miniature design over wearable products.

Tseng further points out, “however, the quality of wearable products faces more severe challenges than general electronic products. Rigid PCBs are used in general electronic products while flexible printed circuits (FPCs) are used in wearable products. Solder joints of components on the FPC have to sustain external forces of greater amplitude owing to the flexible nature of the FPC (even when the component is not positioned at a bend). How to improve reliability of wearable products is a common goal to achieve for both IC designers and FPC manufacturers”.

iST has been queried multiple times by IC design companies recently: whether an international standard is available regarding the reliability verification of FPC solder joints? Is there any verification method that can be used as a reference?

According to iST, there has not yet been a clear definition in any international standard that specifies a method for verifying reliability of components on a FPC. To assist customers in ensuring quality of wearable products, iST cooperates with the customer to jointly design a method for verifying the strength of solder joints in wearable products by taking advantage of a reliability test method.

Board Level Reliability is an empirical means commonly used internationally for verifying solder joint strength, common experiments include drop test, temperature cycle test, bending test, etc. Using Daisy Chain IC in combination with FPC and complemented with a real-time resistance monitoring system, it is possible to effectively demonstrate the lifespan of solder joints of an IC on a FPC.

iST points out that this method has extended into iST’s existing service items: Board Level Reliability Tests, which have already helped customers in consolidating quality of wearable products. iST timely readies itself for any potential needs in the market trend, making itself the most important test partner to the customer.