With optimized cell structure and IP design, the 95nm 5V SG eNVM process enables smaller die size, lower write power (50uA/MHz), and a low static device power (Ioff) at 0.5pA. CPU core clock frequency can reach up to 50MHz, well accommodating the demands of 8-bit MCU applications. The single IP design combining the high performance of Electrically Erasable Programmable Read-Only Memory (EEPROM) and the small size of Flash can significantly reduce size and cost compared with the dual IP design.

Moreover, a more competitive mask layer - with only 19 layers of mask for 3-layer metal, delivers obvious benefits in manufacturing cost. In terms of application, specifically for chips that have a larger analog circuit area, the 95nm 5V SG eNVM process from Hua Hong Semiconductor delivers great cost benefits, including guaranteed performance, high reliability, a data retention duration of more than 30 years, and the capability to endure more than 500,000 write/erase cycles.

"Hua Hong Semiconductor strives to maintain its global competitive edge in the field of eNVM technology, and has achieved excellent results in the smart card and MCU markets in recent years," said Dr. Kong Weiran, Executive Vice President of Hua Hong Semiconductor.