Silicon Labs’ new Wireless Gecko SoCs integrate a powerful ARM Cortex-M4 core, energy-friendly Gecko technology, a 2.4 GHz radio with up to 19.5 dBm output power, and advanced hardware cryptography.

Wireless Gecko SoCs speed wireless design with best-of-breed Thread and ZigBee stacks for mesh networks, intuitive radio interface software for proprietary protocols, Bluetooth Smart for point-to-point connectivity, and Simplicity Studio tools to simplify wireless development, configuration, debugging and low-energy design.

The Wireless Gecko portfolio features three families of multiprotocol SoCs optimized for real-world IoT use cases and the most popular wireless protocols: Blue Gecko family/ Mighty Gecko family/ Flex Gecko family.

Silicon Labs’ pin- and software-compatible Wireless Gecko families enable customers to leverage their development tool and software investments. Developers can select the wireless protocol to meet their application needs today and can easily migrate to other protocols within the portfolio with the assurance of hardware/software reuse.

Wireless Gecko SoCs combine Silicon Labs’ energy-friendly Gecko MCU technology with a multiprotocol 2.4 GHz RF transceiver in a single-die solution with scalable memory options (up to 256 kB flash and up to 32 kB RAM). Hallmarks of Gecko technology include well-architected energy modes, ultra-fast wake-up/sleep transitions, and the Peripheral Reflex System (PRS), enabling autonomous operation of low-power peripherals while the MCU core sleeps.

Based on an ARM Cortex-M4 processor with powerful floating point and DSP capabilities, the Gecko MCU consumes only 63 µA/MHz in active mode. The Wireless Gecko SoCs also integrate a software-programmable power amplifier (PA) and balun to reduce bill of materials (BOM) cost and design complexity while providing scalable output power ranging from -30 dBm up to +19.5 dBm for applications requiring long-range connectivity.

Further enhancing energy efficiency and application code footprint, Wireless Gecko SoCs feature a built-in hardware cryptographic accelerator providing fast, energy-efficient autonomous encryption and decryption of Internet security protocols such as TLS/SSL with minimal CPU intervention.

The on-chip accelerator supports advanced algorithms such as AES with 128- or 256-bit keys, elliptical curve cryptography (ECC), SHA-1 and SHA-224/256. Hardware cryptography enables developers to meet evolving IoT security requirements more efficiently than with software-only techniques required by competing solutions.