They have found that resistance under the SiC interface can be reduced by two-thirds by suppressing electron scattering by the charges, a discovery that is expected to help reduce energy consumption in power equipment by lowering the resistance of SiC power semiconductors.

Going forward, Mitsubishi Electric will continue refining the design and specifications of its SiC metal-oxide-semiconductor field-effect transistor (SiC MOSFET) to further lower the resistance of SiC power semiconductor devices. This research achievement was initially announced at The International Electron Devices Meeting (IEDM2017) in San Francisco, California on December 4 (PST).

The impact that charges and atomic vibration have on electron scattering under the SiC interface was revealed to be dominant in Mitsubishi Electric’s analyses of fabricated devices. Electron scattering focusing on atomic vibration was measured using technology from the University of Tokyo.

Although it has been recognized that electron scatting under the SiC interface is limited by three factors, namely, the roughness of the SiC interface, the charges under the SiC interface and the atomic vibration, the contribution of each factor had been unclear. A planar-type SiC-MOSFET in which electrons conduct away from the SiC interface to around several nano meters was fabricated to confirm the impact of the charges.

As a result, Mitsubishi Electric and the University of Tokyo achieved an unprecedented confirmation that the roughness of the SiC interface has little effect while charges under the SiC interface and atomic vibration are dominant factors.

Compared with a previous planar-type SiC-MOSFET device, resistance was reduced by two thirds owing to suppression of electron scattering, which was achieved by making the electrons conduct away from the charges under the SiC interface. The previous planar-type device used for comparison has the same interface structure as that of the SiC-MOSFET fabricated by Mitsubishi Electric.