TAIPEI, Taiwan - Fan-Out Wafer Level Packaging technology can package different die in one chip, is a key technology of the development of ultra-thin devices. Taiwan's Industrial Technology Research Institute(ITRI) showcased its flexible Fan-Out 3 Layers RDL panel level packaging technology at this year's SEMICON Taiwan, which not only can reduce the thickness of chip and power consumption, but also can increase the output of chip packaging...

HSINCHU, Taiwan – eMemory announced today that it received TSMC’s Open Innovation Platform (OIP) “IP Partner Award” of 2017. The company has been honored with this award in the “Specialty Embedded Memory IP” category every year from its inception in 2010...

HSINCHU, Taiwan – eMemory announced today that it received TSMC’s Open Innovation Platform (OIP) “IP Partner Award” of 2017. The company has been honored with this award in the “Specialty Embedded Memory IP” category every year from its inception in 2010...

The latest update to the World Fab Forecast report, published by SEMI, reveals record spending for fab equipment. The report shows 30 facilities and lines with over $500 million in fab equipment spending. 2017 fab equipment spending (new and refurbished) is expected to increase by 37 percent, reaching a new annual spending record of about US$55 billion...

The latest update to the World Fab Forecast report, published by SEMI, reveals record spending for fab equipment. The report shows 30 facilities and lines with over $500 million in fab equipment spending. 2017 fab equipment spending (new and refurbished) is expected to increase by 37 percent, reaching a new annual spending record of about US$55 billion...

Synopsys today announced its collaboration with TSMC to develop foundry-sponsored DesignWare Foundation IP, including logic libraries and embedded memories, for TSMC's 40-nanometer (nm) ultra-low power (ULP) eFlash and 40-nm low-power (LP) eFlash processes...

Synopsys today announced its collaboration with TSMC to develop foundry-sponsored DesignWare Foundation IP, including logic libraries and embedded memories, for TSMC's 40-nanometer (nm) ultra-low power (ULP) eFlash and 40-nm low-power (LP) eFlash processes...